Conferences

Authors Title Conference Page Venue Date
298 Arati Kumari Shah, Seung Hyun Kim, and Seongjae Cho Integrate-and-Fire Neuron Circuit Simulation with 180-nm Technology for Si CMOS Spiking Neural Network The 29th Korean Conference on Semiconductors (KCS) 737 Gangwon-do, Korea Jan. 24-26, 2022
297 Sibeom Kim, Young Jun Yoon, and Seongjae Cho Effects of Irradiation of High-Energy Hydrogen Ions on the Characteristics of Poly-Si Floating-Gate Metal-Oxide-Semiconductor Field-Effect Transistor The 29th Korean Conference on Semiconductors (KCS) 395 Gangwon-do, Korea Jan. 24-26, 2022
296 Inyoung Lee, Kyung Song, Seungmin Lee, Il Hwan Cho, and Seongjae Cho Highly Reliable Electrical Extraction of Density of Grain Boundary States from the Ultrathin Poly-Si MOSFET Channel The 29th Korean Conference on Semiconductors (KCS) 126 Gangwon-do, Korea Jan. 24-26, 2022
295 Md. Hasan Raza Ansari, Kannan U. M., and Seongjae Cho Gate-All-Around (GAA) Synaptic Transistor with Linear Weight Adjustability for Neuromorphic Computing Architecture 2021 International Conference on Solid State Devices and Materials (SSDM) 684-685 Virtual Sep. 6-9, 2021
294 Yi Ju Lee, Seungjo Baek, and Seongjae Cho Assessment of Data Retainability in Capacitorless Dynamic Random-Access Memory by Time- and Position-Dependent Hole Diffusion Function 2021 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD) B1-6 Sendai, Japan (Virtual) Aug. 26-27, 2021
293 Inyoung Lee, Seongjae Cho, and Il Hwan Cho Investigation of poly-silicon channel variation in vertical 3D NAND flash memory 2021 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD) P-2 Sendai, Japan (Virtual) Aug. 26-27, 2021
292 Seongjae Cho [Invited] Volatile and Nonvolatile Memory Device Technologies for Processing-in-Memory 2021 IEEE Region 10 Symposium (TENSYMP) 20 Jeju, Korea Aug. 23-25, 2021
291 Seungjo Baek, Byeong Eun Yoo, Iju Lee, and Seongjae Cho Design of Compact 2T(0C) DRAM Cell Allowing Nondestructive Read Operation and Glance at Its Applications as Synaptic Device 2021 IEIE Summer Conference 515-516 Jeju, Korea Jun. 30 - Jul. 2, 2021
290 Jin So, Seongjae Cho, Il Hwan Cho, and Garam Kim Design of 1T DRAM Device with a Hole Storage Region and Analysis on Its Sensing Margin 2021 IEIE Summer Conference 405-406 Jeju, Korea Jun. 30 - Jul. 2, 2021
289 Won-Hyeong Joo, Seongjae Cho, Il Hwan Cho, and Garam Kim Analysis on Improvement in Performance of 1T DRAM Device with a Partial SiGe Layer in the Floating Body 2021 IEIE Summer Conference 403-404 Jeju, Korea Jun. 30 - Jul. 2, 2021
288 Byeong Eun Yoo, Iju Lee, Seungjo Baek, and Seongjae Cho Fabrication and Operation of the Vertical Heterojunction Shockley Diode for Application as Synaptic Device with Multiple-Weight Tunability and Short-Term Plasticity 2021 IEIE Summer Conference 172-173 Jeju, Korea Jun. 30 - Jul. 2, 2021
287 Md. Hasan Raza Ansari, Daehwan Kim, Seongjae Cho, Jong-Ho Lee, and Byung-Gook Park Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity 5th IEEE Electron Devices Technology and Manufacturing (EDTM) Conference 2021 WTHPE-071 Chengdu, China Apr. 8-11, 2021
286 Daehwan Kim, Jae Hoon Park, Chang Kyun Kim, and Seongjae Cho Effects of High-Energy Electron Injection on MOSFET Reliability The 28th Korean Conference on Semiconductors (KCS) 230 Virtual Jan. 25-29, 2021
285 Md. Hasan Raza Ansari, Daehwan Kim, and Seongjae Cho Design and Characterization of Complementary Tunneling Field-Effect Transistors Integrated in a Single Device The 28th Korean Conference on Semiconductors (KCS) 209 Virtual Jan. 25-29, 2021
284 Daehwan Kim, Hyojong Cho, Junhyeok Choi, Hyeonpyo Lee, Changhun Kim, Won-Jun Lee, Jongwan Jung, Sungjun Kim, and Seongjae Cho Vertical Si/SiGe Heterojunction 2-Terminal Thyristor Dynamic Random-Access Memory Demonstrating Gradual Switching Characteristics 2020 IEIE Fall Conference 106-107 Gwangju, Korea Nov. 27-28, 2020
283 Hyojong Cho, Daehwan Kim, Junhyeok Choi, Jae Yoon Lee, Hyeonpyo Lee, Changhun Kim, Sungjun Kim, and Seongjae Cho Self-Aligned Etching Technique for Vertical Double-Step Structure and Its Application in the Fabrication of Cross-Bar Array 2020 IEIE Summer Conference 556-558 Jeju, Korea Aug. 19-21, 2020
282 Daehwan Kim, Junhyeok Choi, Sungjun Kim, Hyungjin Kim, and Seongjae Cho Characterization of TiOx ReRAM and Development of Its DC Compact Model 2020 IEIE Summer Conference 80-82 Jeju, Korea Aug. 19-21, 2020
281 Hyeonpyo Lee and Seongjae Cho Design of a Heterojunction Tunneling Field-Effect Transistor for Gate-Drain-Tied 2-Terminal Operation 2020 IEIE Summer Conference 74-76 Jeju, Korea Aug. 19-21, 2020
280 Md. Hasan Raza Ansari and Seongjae Cho A Novel 1T DRAM with Shell/Core Dual-Gate Architecture 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) 90-91 Hsinchu, Taiwan Aug. 10-13, 2020
279 Md. Hasan Raza Ansari, Jae Yoon Lee, Seongjae Cho, and Byung-Gook Park Design and Analysis of Core-Gate Shell-Channel 1T DRAM 2020 Silicon Nanoelectronic Workshop (SNW) Honolulu, USA Jun. 13-14, 2020
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